IOKEEP=0, DEEPCUT=00, DPSBY=0
Deep Standby Control Register
| DEEPCUT | Power-Supply Control 0 (00): Power to the standby RAM, Low-speed on-chip oscillator, AGTn, and USBFS/HS resume detecting unit is supplied in deep software standby mode. 1 (01): Power to the standby RAM, Low-speed on-chip oscillator, AGTn, and USBFS/HS resume detecting unit is not supplied in deep software standby mode. 2 (10): Setting prohibited. 3 (11): Power to the standby RAM, Low-speed on-chip oscillator, AGTn, and USBFS/HS resume detecting unit is supplied in deep software standby mode. In addition, LVD is disabled and the low power function in a power-on reset circuit is enabled. |
| IOKEEP | I/O Port Retention 0 (0): When the Deep Software Standby mode is canceled, the I/O ports are in the reset state. 1 (1): When the Deep Software Standby mode is canceled, the I/O ports are in the same state as in the Deep Software Standby mode. |
| DPSBY | Deep Software Standby 0 (0): Sleep mode (SBYCR.SSBY=0) / Software Standby mode (SBYCR.SSBY=1) 1 (1): Sleep mode (SBYCR.SSBY=0) / Deep Software Standby mode (SBYCR.SSBY=1) |